Parts By NSN 5962-00-168-8708
Item Name: Microcircuit Digita |
FSG: 59 Electrical and Electronic Equipment Components |
FSC Name: 5962 Microcircuits Electronic |
CAGE Code: 09966, 04713, 07263, 97896, 58625, 3V146, 35351, 54485, 59926, 4Y370, 80378 |
NIIN: 001688708 |
NCB Code: USA (00) |
Manufacturers: instrument systems corp , freescale semiconductor inc , fairchild semiconductor ltd , honeywell international inc , lansdale semiconductor inc , rochester electronics llc , ge aviation systems llc , microsemi corp , rodelco electronics corp , rel labs inc , triumph aerostructures llc |
NSN 5962-00-168-8708 assigned to Microcircuit Digita manufactured by Instrument Systems Corp, Freescale Semiconductor Inc, Fairchild Semiconductor Ltd, Honeywell International Inc, Lansdale Semiconductor Inc. Listed below are the available items with the NSN 5962-00-168-8708, along with the related parts. Please submit an instant RFQ form to receive a competitive quote within 15 minutes.
MRC | Criteria | Characteristic |
---|---|---|
ADAQ | BODY LENGTH | 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
AEHX | MAXIMUM POWER DISSIPATION RATING | 500.0 MILLIWATTS |
AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
AFJQ | STORAGE TEMP RANGE | 65.0/+150.0 DEG CELSIUS |
CBBL | FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND ASYNCHRONOUS AND EDGE TRIGGERED AND LOW POWER AND MEDIUM SPEED AND RESETTABLE AND SYNCHRONOUS |
CQSZ | INCLOSURE CONFIGURATION | FLAT PACK |
CQWX | OUTPUT LOGIC FORM | DIODE-TRANSISTOR LOGIC |
CSSL | DESIGN FUNCTION AND QUANTITY | 2 FLIP-FLOP, J-K, CLOCKED AND 2 FLIP-FLOP, J-K, MASTER SLAVE |
CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 5.5 VOLTS MAXIMUM POWER SOURCE |
PRMT | PRECIOUS MATERIAL | GOLD |
TTQY | TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
ADAT | BODY WIDTH | 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
ADAU | BODY HEIGHT | 0.050 INCHES MINIMUM AND 0.065 INCHES MAXIMUM |
CQSJ | INCLOSURE MATERIAL | CERAMIC AND GLASS |
CQZP | INPUT CIRCUIT PATTERN | DUAL 4 INPUT |
CWSG | TERMINAL SURFACE TREATMENT | SOLDER |
CZEQ | TIME RATING PER CHACTERISTIC | 75.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 75.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
PMLC | PRECIOUS MATERIAL AND LOCATION | TERMINAL SURFACE GOLD |
TEST | TEST DATA DOCUMENT | 35351-149397 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWI |
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